Floating Point Multiplier Analysis

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CHAPTER 5 SYSTEM COMPONENT 5.1 BLOCK DIAGRAM Fig 5.1: Schematic block diagram of floating point multiplier Fig. 5.2: Implementation block diagram of floating point multiplier 5.1.1 Block Diagram Description Floating point multiplier is the utmost general element in most of digital applications such as filters, signal processors, control units and data processors. The present Floating Point Multiplier has three blocks sign calculator, exponent calculator and mantissa calculator, they works in parallel and a normalization unit. The Multiplier is pipelined, so the first result appears after the quiescence period and then the result can be acess after every clock cycle. Fig. 5.1 presents the schematic symbol of floating point multiplier. …show more content…

This block is realized in three pipelined stages. The first block calculates how much amount of mantissa needs to be shifted left. The mantissa is handled in parallel in a number of modules, each monitor at four bits of the mantissa. The first module inspects at first four bits of the mantissa and outputs the quantity to be shifted supposing a one was erect on these four bits. The second module operates on the next four bits of the mantissa acting first four bits are zero and outputs the quantity to be left shifted. This action is repeated for the remaining bits of mantissa. Signals are created if the four bits of the mantissa are zero. Based on the signal values the quantity of shift is selected. This adoption is implemented in three multiplexer stages. Based on the two leading bits of final mantissa, the final mantissa is shifted left by earlier calculated shift quantity or shifted right. The final exponent is furthermore modified accordingly. 5.1.2 Functional Block Diagram: Fig 5.3: Functional Circuit Diagram of Floating Point Multiplier (i) Sign Bit Calculator: Result of multiplication of two numbers is a negative sign if one of the multiplied numbers is of a negative value. With the use of truth table we find that this can be obtained by Ex-oring the sign of two inputs. Here in the truth table we can see that if one number is negative (for negative sign bit is 1) and result is negative. TABLE 5.1: TRUTH TABLE OF EX-OR GATE Input Output A B Y 0 0 0 0 1

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