1700 Words7 Pages

7.1 DESIGN OF PFC BL BUCK–BOOST CONVERTER
A PFC BL buck–boost converter is designed to operate in DICM such that the current in inductors Li1 and Li2 becomes discontinuous in a switching period. For a BLDC of power rating 251 W (complete specifications of the BLDC motor are given in the Appendix), a power converter of 350 W (Po) is designed. For a supply voltage with an rms value of 220 V Fig. 4. Supply current at the rated load on BLDC motor for different values of input side inductors with supply voltage as 220 V and dc link voltage as 50 V.
The proposed converter is designed for dc link voltage control from 50 V (Vdc min) to 200 V (Vdcmax) with a nominal value (Vdc des) of 100 V; hence, the minimum and the maximum duty ratio (dmin*…show more content…*

The analysis of supply current at minimum duty ratio (i.e., supply voltage as 220 V and dc link voltage as 50 V) is carried out for different values of the inductor (Li1 and Li2). Fig. 4 shows the supply current at the input inductor’s value as Lic, Lic/2, Lic/5, and Lic/10, respectively. The supply current at higher values of the input side inductor is highly distorted due to the inability of the converter to operate in DICM at peak values of supply voltages. Hence, the values of inductors Li1 and Li2 are selected around 1/10th of the critical inductance and are taken as 35 μH. It reduces the size, cost, and weight of the PFC converter. B. Design of DC Link Capacitor (Cd) The design of the dc link capacitor is governed by the amount of the second-order harmonic (lowest) current flowing in the capacitor and is derived as follows. For the PFC operation, the supply current (is) is in phase with the supply voltage (vs). Hence, the input power Pin is given as Pin = √2VsSinωt x √2IsSinωt = VsIs(1-cos2ωt) (5) Where the latter term corresponds to the second-order harmonic, which is reflected in the dc link capacitor*…show more content…*

The analysis of supply current at minimum duty ratio (i.e., supply voltage as 220 V and dc link voltage as 50 V) is carried out for different values of the inductor (Li1 and Li2). Fig. 4 shows the supply current at the input inductor’s value as Lic, Lic/2, Lic/5, and Lic/10, respectively. The supply current at higher values of the input side inductor is highly distorted due to the inability of the converter to operate in DICM at peak values of supply voltages. Hence, the values of inductors Li1 and Li2 are selected around 1/10th of the critical inductance and are taken as 35 μH. It reduces the size, cost, and weight of the PFC converter. B. Design of DC Link Capacitor (Cd) The design of the dc link capacitor is governed by the amount of the second-order harmonic (lowest) current flowing in the capacitor and is derived as follows. For the PFC operation, the supply current (is) is in phase with the supply voltage (vs). Hence, the input power Pin is given as Pin = √2VsSinωt x √2IsSinωt = VsIs(1-cos2ωt) (5) Where the latter term corresponds to the second-order harmonic, which is reflected in the dc link capacitor as Ic(t) = - VsIs/VdcCos2ωt (6) The dc link voltage ripple corresponding to this capacitor current is given as ∆Vdc = 1/Cd ∫ ic(t) dt = - Id/2ωCdSin2ωt

The analysis of supply current at minimum duty ratio (i.e., supply voltage as 220 V and dc link voltage as 50 V) is carried out for different values of the inductor (Li1 and Li2). Fig. 4 shows the supply current at the input inductor’s value as Lic, Lic/2, Lic/5, and Lic/10, respectively. The supply current at higher values of the input side inductor is highly distorted due to the inability of the converter to operate in DICM at peak values of supply voltages. Hence, the values of inductors Li1 and Li2 are selected around 1/10th of the critical inductance and are taken as 35 μH. It reduces the size, cost, and weight of the PFC converter. B. Design of DC Link Capacitor (Cd) The design of the dc link capacitor is governed by the amount of the second-order harmonic (lowest) current flowing in the capacitor and is derived as follows. For the PFC operation, the supply current (is) is in phase with the supply voltage (vs). Hence, the input power Pin is given as Pin = √2VsSinωt x √2IsSinωt = VsIs(1-cos2ωt) (5) Where the latter term corresponds to the second-order harmonic, which is reflected in the dc link capacitor

The analysis of supply current at minimum duty ratio (i.e., supply voltage as 220 V and dc link voltage as 50 V) is carried out for different values of the inductor (Li1 and Li2). Fig. 4 shows the supply current at the input inductor’s value as Lic, Lic/2, Lic/5, and Lic/10, respectively. The supply current at higher values of the input side inductor is highly distorted due to the inability of the converter to operate in DICM at peak values of supply voltages. Hence, the values of inductors Li1 and Li2 are selected around 1/10th of the critical inductance and are taken as 35 μH. It reduces the size, cost, and weight of the PFC converter. B. Design of DC Link Capacitor (Cd) The design of the dc link capacitor is governed by the amount of the second-order harmonic (lowest) current flowing in the capacitor and is derived as follows. For the PFC operation, the supply current (is) is in phase with the supply voltage (vs). Hence, the input power Pin is given as Pin = √2VsSinωt x √2IsSinωt = VsIs(1-cos2ωt) (5) Where the latter term corresponds to the second-order harmonic, which is reflected in the dc link capacitor as Ic(t) = - VsIs/VdcCos2ωt (6) The dc link voltage ripple corresponding to this capacitor current is given as ∆Vdc = 1/Cd ∫ ic(t) dt = - Id/2ωCdSin2ωt

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