Windows Virtual Address Lab Report

Windows virtual address map

1. Introduction
The virtual address space for a process is nothing butthe set of virtual memory address for a process. The address space for each process isprivate and cannot be accessed by other processes without being shared.A virtual address does not represent the actual physical location of an object in memory. The system will maintain page table for each process. Page table is an internal data structure used to translate virtual addresses into their corresponding physical addresses. Whenever thread references address, the virtual address is translated to a physical address by a system.Virtual Address Space is used on a memory mapping mechanism where physical memory is

This mechanism improves upon simpler algorithm such as static partitioning by allocating fixed size memory to processes. Each process is given its own logical memory space. In other words each process has its own view of memory with its own address space. The address that the process sees is called Logical Address. The logical addresses are divided into fixed size pages. When a process accesses memory the CPU translates the logical addresses to physical addresses. The physical memory is divided into units called

Thus to address 4 GB memory we will need 1 Mega (1024 x 1024) 4 KB pages. The processor uses a two level structure to refer to these Mega pages. It can be thought of as two dimensional matrixes, the first dimension known as Page Directory and second dimension known as Page Table. Thus we can create a page directory with 1024 entries, each of which points to a page table. This will allow us to have 1024 page tables.

Each Page Directory Entry (PDE) is 4 bytes in size and points to a page table. Similarly each page table entry (PTE) is 4 bytes in size and points to physical address of a 4 KB page. To store 1024 PDE each containing 1024 PTE, we will need a total memory of 4*1024*1024 bytes. Thus to divide the whole 4 GB address space into 4 KB we need 4 MB memory. When PDE or PTE is used its upper 20 bits gives 4KB page aligned address and lower 20 bits are used to store the page protection information. The upper 20 bits which represents the actual physical address are known as Page Frame Number (PFN).

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